Flash Memory Devices

Nano Particle Based Capacitive Memory

We demonstrate all inorganic, robust, cost-effective, spin-coated, two-terminal capacitive memory metal-oxide nanoparticle-oxide-semiconductor devices with cadmium telluride nanoparticles sandwiched between aluminum oxide phosphate layers to form the dielectric memory stack. Using a novel high-speed circuit to decouple reading and writing, experimentally measured memory windows, programming voltages, retention times, and endurance are comparable with or better than the two-terminal memory devices realized using other fabrication techniques.

IEEE Electron Device Letters 37(4), 396-399 (2016).


New Mesurement Technology

High Speed CV Measurement Technique

In two-terminal capacitive devices, an experimental challenge is to measure the threshold voltage (or equivalently the flatband voltage VFB) without disturbing the memory state. Conventional LCR meters with slow DC sweeps generate CV curves (LCRCV) with hysteresis, showing that the charge storage, and hence memory state, is altered during the measurement itself. In order to decouple the memory programming ("writing") with the flatband voltage measurement ("reading"), we have realized a simple high speed CV (HSCV) pulse circuit that completes the measurement in less than 10 us, faster than the time required to change the charge state.

IEEE Electron Device Letters 37(4), 396-399 (2016).


Fully Spin Coated Dielectrics

Low temperature solution processed high-k ZrO2 gate dielectrics fornanoelectonics
A 35 nm thick ZrO2 films on silicon substrate are fabricated by low temperature assisted facile spin-coating technique (300 C, 1 h). Spin-coating and the low temperature treatment reduces the fabrication cost. The structural, optical, electrical properties of the films are evaluated and the current conduction mechanism is discussed in detail.

Applied Surface Science 370,373-379(2016).
Critical investigation of high performance spin-coated high-k titania thin films based MOS capacitor
we investigate the tunable dielectric constant of titania films with small leakage current density.This study provides a broad insight of the processing parameters towards the use of titania as high-k insulating layer which might be useful in Si and polymer based flexible devices.

Journal of Materials Science: Materials in Electronics 27(5),5264-5270(2016).
High performance sol-gel spin-coated titanium dioxide dielectric

In order to achieve continuous downscaling and improved performance of complementary metal oxide semiconductor (CMOS) devices, intense research is devoted into probing high-permittivity (k) dielectric materials to substitute conventional SiO2 with its excessive gate leakage current due to direct tunneling at a thicknesses of 1.2 nm. Among various high-k dielectrics reported so far, titania seems to be a suitable alternative, owing to its exceptional physicochemical and optoelectronic properties.

Materials Science in Semiconductor Processing 40, 77-83 (2015).
DLTS analysis of amphoteric interface defects in high-TiO2 MOS structures
A simple and an in-expensive process of combined sol-gel spin-coating method might be a good replacement for the expensive high vacuum deposition techniques in the development of high-k dielectrics based on MOS structures and the DLTS study can provide a better understanding of TiO2/Si interfaces.

AIP Advances 5(11),117122(2015).